(1) Field of the Invention
The present invention relates to methods used to fabricate semiconductor devices, and more specifically to a process used to fabricate a copper damascene structure, in an opening in an insulator layer.
(2) Description of the Prior Art
The ability of the semiconductor industry to use copper structures, in place of higher resistivity, aluminum counterparts, have allowed reductions in performance degrading RC delays to be realized. In addition, the ability to create dual damascene copper structures, comprised of copper interconnect structures, in an overlying, wide diameter opening in an insulator layer, as well as comprised of copper via structure, located in the underlying, narrow diameter opening, has reduced process complexity and cost, when compared to counterparts, in which individual patterning procedures are used for the metal interconnect and for the metal via structures. However to successfully fabricate damascene copper structures, procedures such as chemical mechanical polishing, (CMP), have to be used to remove copper from all regions, except from the copper residing in the damascene opening. The chemistry of the alumina slurry, used for CMP removal of unwanted copper, usually acidic, can however result in unwanted corrosion of the top surface of the damascene copper structure, as a result of the CMP procedure, or unwanted corrosion of exposed regions of the copper damascene structure can result from reactants used during subsequent insulator depositions.
This invention will describe novel procedures, used to reduce, or prevent, the extent of copper corrosion, resulting from the CMP procedure, or from a subsequent insulator deposition procedure. A first procedure is the ion implantation of boron ions, into a dual damascene, or damascene, copper structure, prior to implementing an over-polish cycle, of the CMP procedure, used to insure complete removal of unwanted regions of copper. The boron implantation procedure selectively creates a corrosion resistant, boron containing copper region, in a top portion of the copper damascene structure, which protects the exposed copper surface during subsequent processing procedures, such as the final, or CMP over-etch, cycle, as well as protecting from reactants, such as NH.sub.3 or SiH.sub.4, used during a plasma enhanced chemical vapor deposition, (PECVD), procedure, used to deposit an overlying silicon nitride layer.
A second procedure, used to protect copper surfaces from finishing CMP cycles, or from the reactants used for deposition of subsequent insulator layers, is to form the opening, needed for the copper damascene structure, in a composite insulator layer, comprised of a borosilicate glass, (BSG), or a borophosphosilicate glass, (BPSG), layer, overlying a silicon oxide layer. After copper filling of the opening, the CMP procedure, after removing copper from the top surface of the BSG layer, will move boron from the exposed BSG layer, to the copper surface, exposed in the opening, forming the desired, boron containing region, in a top portion of the copper damascene structure. Prior art, such as Joshi et al, in U.S. Pat. No. 5,731,254, describe a process for forming a capping layer, for copper structures, via creation of a germanium-copper hard cap layer. However that prior art does not selectively place boron ions, in a top portion of the copper structure. A second prior art, Landers et al, in U.S. Pat. No. 5,676,587, describe the use of BSG, as a component of the composite insulator layer, in which the damascene type opening is formed in. However that prior art caps the BSG layer with a barrier layer. Therefore the subsequent CMP procedure never interfaces with the underlying BSG layer.